Half Adder :
It contains two inputs and two outputs , the inputs are those which are to be added and the outputs are sum and carry .
Program :
(c) Structural Modeling
`timescale 1ns / 1ps
module half_adder_struct(a,b,s,c);
input a,b;
output s,c;
xor21 u1(a,b,s);
and21 u2(a,b,c);
endmodule
module and21(a,b,y);
input a,b;
output y;
assign y=a&b;
endmodule
module xor21(a,b,y);
input a,b;
output y;
assign y=a^b;
endmodule
It contains two inputs and two outputs , the inputs are those which are to be added and the outputs are sum and carry .
(a) Dataflow modeling
`timescale 1ns / 1ps
module half_adder_dataflow(a,b,s,c);
input a,b;
output s,c;
assign s=a^b;
assign c=a&b;
endmodule
(b) Behavioral Modeling
`timescale 1ns / 1ps
module half_adder_behav(a,b,s,c);
input a,b;
output reg s,c;
always@*
begin
if(a==1'b0 & b==1'b0)
begin
s<=1'b0;
c<=1'b0;
end
else if(a==1'b0 & b==1'b1)
begin
s<=1'b1;
c<=1'b0;
end
else if(a==1'b1 & b==1'b0)
begin
s<=1'b1;
c<=1'b0;
end
else if(a==1'b1 & b==1'b1)
begin
s<=1'b1;
c<=1'b1;
end
end
endmodule
`timescale 1ns / 1ps
module half_adder_dataflow(a,b,s,c);
input a,b;
output s,c;
assign s=a^b;
assign c=a&b;
endmodule
(b) Behavioral Modeling
`timescale 1ns / 1ps
module half_adder_behav(a,b,s,c);
input a,b;
output reg s,c;
always@*
begin
if(a==1'b0 & b==1'b0)
begin
s<=1'b0;
c<=1'b0;
end
else if(a==1'b0 & b==1'b1)
begin
s<=1'b1;
c<=1'b0;
end
else if(a==1'b1 & b==1'b0)
begin
s<=1'b1;
c<=1'b0;
end
else if(a==1'b1 & b==1'b1)
begin
s<=1'b1;
c<=1'b1;
end
end
endmodule
(c) Structural Modeling
`timescale 1ns / 1ps
module half_adder_struct(a,b,s,c);
input a,b;
output s,c;
xor21 u1(a,b,s);
and21 u2(a,b,c);
endmodule
module and21(a,b,y);
input a,b;
output y;
assign y=a&b;
endmodule
module xor21(a,b,y);
input a,b;
output y;
assign y=a^b;
endmodule
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