Full Adder

Full Adder :

Full Adder contains a extra carry input when compared to Half Adder , Here we are including the Carry of the previous stage in the present stage addition .

Program Code :

(a) Dataflow Modeling

`timescale 1ns / 1ps
module full_adder_dataflow(a,b,cin,s,cout);
input a,b,cin;
output s,cout;
assign s=a^b^cin;
assign c=(a&b)|((b^cin)|(cin^a));
endmodule 

(b) Behavioral Modeling

`timescale 1ns / 1ps
module full_adder_behav1(a,b,cin,s,cout);
input a,b,cin;
output reg s,cout;
reg [2:0]d;
reg [1:0] s1;
always@*
begin
d[0]<=cin;
d[1]<=b;
d[2]<=a;
case(d)
3'b000: s1<=2'b00;
3'b001: s1<=2'b10; 
3'b010: s1<=2'b10;
3'b011: s1<=2'b01; 
3'b100: s1<=2'b10; 
3'b101: s1<=2'b01; 
3'b110: s1<=2'b01; 
3'b111: s1<=2'b11; 
default: s1<=2'b00; 
endcase
s<=s1[1];
cout<=s1[0];
end
endmodule

(c) Structural Modeling

`timescale 1ns / 1ps
module full_adder_struct(a,b,cin,s,cout);
input a,b,cin;
output s,cout;
xor21 u1(a,b,s1);
xor21 u2(s1,cin,s);
and21 u3(a,b,c1);
and21 u4(b,cin,c2);
and21 u5(cin,a,c3);
or31 u6(c1,c2,c3,cout);
endmodule 
module and21(a,b,y);
input a,b;
output y;
assign y=a&b;
endmodule
module xor21(a,b,y);
input a,b;
output y;
assign y=a^b;
endmodule 
module or31(a,b,c,y);
input a,b,c;
output y;
assign y=a|b|c;
endmodule