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Comparator 74 85

Comparator : 74 85 


`timescale 1ns / 1ps
module B4_COMP_74X85(A,B,AGBIN,ALBIN,AEQBIN,AGBOUT,ALBOUT,AEQBOUT); input [3:0]A,B;
input AGBIN,ALBIN,AEQBIN;
output reg AGBOUT,ALBOUT,AEQBOUT;
always@*
begin
if (A[3]>B[3])
begin
AGBOUT<=1'b1;
ALBOUT<=1'b0;
AEQBOUT<=1'b0;
end
else
if(A[3]<B[3])
begin
AGBOUT<=1'b0;
ALBOUT<=1'b1;
AEQBOUT<=1'b0;
end
else
if(A[3]==B[3] & A[2]>B[2])
begin
AGBOUT<=1'b1;
ALBOUT<=1'b0;
AEQBOUT<=1'b0;
end
else
if(A[3]==B[3] & A[2]<B[2])
begin
AGBOUT<=1'b0;
ALBOUT<=1'b1;
AEQBOUT<=1'b0;
end
else
if(A[3]==B[3] & A[2]==B[2] & A[1]>B[1])
begin
AGBOUT<=1'b1;

ALBOUT<=1'b0;
AEQBOUT<=1'b0;
end
else
if(A[3]==B[3] & A[2]==B[2] & A[1]<B[1])
begin
AGBOUT<=1'b0;
ALBOUT<=1'b1;
AEQBOUT<=1'b0;
end
else
if(A[3]==B[3] & A[2]==B[2] & A[1]==B[1] & A[0]>B[0])
begin
AGBOUT<=1'b1;
ALBOUT<=1'b0;
AEQBOUT<=1'b0;
end
else
if(A[3]==B[3] & A[2]==B[2] & A[1]==B[1] & A[0]<B[0])
begin
AGBOUT<=1'b0;
ALBOUT<=1'b1;
AEQBOUT<=1'b0;
end
else
if(A[3]==B[3] & A[2]==B[2] & A[1]==B[1] & A[0]==B[0])
begin
if(AGBIN==1'b1 & ALBIN==1'b0 & AEQBIN==1'b0)
begin
AGBOUT<=1'b1;
ALBOUT<=1'b0;
AEQBOUT<=1'b0;
end
else
if(AGBIN==1'b0 & ALBIN==1'b1 & AEQBIN==1'b0)
begin
AGBOUT<=1'b0;
ALBOUT<=1'b1;
AEQBOUT<=1'b0;
end
else
if(AGBIN==(1'b1|1'b0) & ALBIN==(1'b0|1'b1) & AEQBIN==1'b1)
begin
AGBOUT<=1'b0;
ALBOUT<=1'b0;
AEQBOUT<=1'b1;
end
else
if(AGBIN==1'b1 & ALBIN==1'b1 & AEQBIN==1'b0)
begin
AGBOUT<=1'b0;
ALBOUT<=1'b0;
AEQBOUT<=1'b0;
end
else
if(AGBIN==1'b0 & ALBIN==1'b0 & AEQBIN==1'b0)
begin

AGBOUT<=1'b1;
ALBOUT<=1'b1;
AEQBOUT<=1'b0;
end
end
end
endmodule

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